Recently, the usage of non-volatile memory comprising a semiconductor device capable of rewriting data and retaining data stored therein even while the device is un-powered has become increasingly popular. Flash memory is one example of non-volatile memory. A typical flash memory is provided with a transistor which operates as a memory cell and includes a floating gate or an insulating film called a charge storage layer for accumulating electrons used to store data. Flash memory with a SONOS (Silicon Oxide Nitride Oxide Silicon) structure for accumulating the electrons in a trap layer of an ONO (Oxide Nitride Oxide) film has been introduced as a flash memory using an insulating film as the charge storage layer.
One example of a flash memory with a SONOS structure is a flash memory having a memory cell of virtual ground type for switching between the source and the drain so as to be symmetrically operated. This makes it possible to form two or more charge storage regions per one memory cell so as to record the data with 2 bits or more. In a flash memory according to this structure, the bit line is formed of a diffusion layer inside the semiconductor substrate, and the implantation dose amount is required to be increased for lowering the resistance of the bit line. However, if the implantation dose amount is increased, the dopant diffuses both in the lateral and longitudinal directions to reduce the channel length. In the case where a plurality of the charge storage regions are formed in a single memory cell, a channel of a certain length or longer is required to be kept for the purpose of separating the charge storage regions from each other. As a result, it is difficult for flash memory having this structure to miniaturize the memory cell while keeping the channel length.
Furthermore, flash memory having a memory cell of virtual ground type for switching between the source and the drain so as to be symmetrically operated may include a bit line inside the semiconductor substrate as a diffusion layer. The effort to miniaturize the memory cell so as not to raise the bit line resistance may cause the bit line to be highly doped. For example, if the dose amount upon ion implantation is increased for highly doping the bit line, the bit line may be expanded in the lateral and the longitudinal directions. Accordingly, a channel length between the bit lines becomes short. It is not preferable to reduce the channel length because the charge storage regions become too close with each other. Accordingly, this structure has difficulties in miniaturization of the memory cell. Furthermore, because the bit line is formed inside the semiconductor substrate, a p-type density of the semiconductor substrate cannot be increased. The resistance of the bit line becomes high accompanied with the increase in the p-type density. So the p-type density of the channel cannot be increased, and accordingly, the threshold voltage is lowered.